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Single Instruction Multiple Data (SIMD)
From CompArch
SIMD = Single Instruction Multiple Data. Part of Flynn's SISD/SIMD/MIMD terminology.
Classic example: Illiac IV.
More recent: Thinking Machines-1
SIMD is ambiguous
There are at least three distinct uses of the term SIMD:
- SIMD packed vector instruction sets, as in Intel MMX or SSE
They are related - but quite different.
Evolution of SIMD
Subsequently, the term SIMD has evolved alongside related architectures and microarchitectures.
For example, some are adamant that vector machines like the Cray-1 are SIMD machines. Certainly the vector instructions are SIMD. But there are also scalar instructions executed once only, rather than being replicated as in some more traditional SIMD machines. Also, butmany vector machines do not have truly SIMD load/store, which would require arbitrary scatter/gather, but are restricted to contiguous or unit strudevectors. Furthermore, many vector machines allow much interchange between vector lanes, something not typical of "pure" SIMD.
Siimilarly, microprocessor instruction sets such as Intel x86 MMX and SSE ("streaming SIMD Extensions") and PowerPCAltivec are SIMD wrt execution units, but usually not wrt memnory - i.e. they do not support scatter/gather.
GPUs have also evolved past SIMD. Perhaps older GPUs, in the late 1990s and early 2000s, weresomewhat pure SIMD, but in the late 2000s GPUs have evolved to be what Nvidia calls SIMT, Single Instruction Multiple Thread. This is really SIMD, except that the "lanes" could be totally independent processors executing on MIMD machines.
Indeed, some of the people who are vociferous about calling vector machines SIMD are equally vociferous about saying GPUs are not SIMD.
SIMT can be considered SIMD. Or it can be considered an optimization of MIMD, taking advantage of the fact that different threads are often executing the same instruction with the same flow of control - instruction coherence or control flow coherence - and possibly the same or nearby data, e.g. adjacent data items in the same cacheline, or adjacent cache lines or pages - data coherence. Because SIMT exploits coherence, I propose the term CIMT - coherent instruction multiple threads - to emphasize the fact that SIMT has already evolved to DIMT (dual instruction...) and NIMT.
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