Andy Glew's comp-arch.net wiki, http://semipublic.comp-arch.net
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comp-arch.net wiki on hold from October 17, 2011
Design Principles and Rules of Thumb
From CompArch
Widely Agreed Upon
- Deterministic Debuggability is Good
- Glew
- One of the big advantages of single threaded programs is that they are completely reproducible. In the absence of things like reading timers, given the same input, they will always produce the same output.
- Multithreaded programs often do not exhibit this deterministic reproducibility.
- Some facilities, like Itanium ALAT, have added non-determinism to single threaded programs. They have nearly always failed. I postulate that Deterministic Reproducibility is one reason why they have failed.
- TANSTAAFL (There Ain't No Such Thing As A Free Lunch)
Tradeoffs are a fundamental part of computer architecture. Some areas of design tradeoffs include:
- Separation versus sharing
- Generality versus specialization
- Hardware versus software
- Dynamic versus static
- Speculative versus non-speculative execution
Design choices are rarely all-or-nothing and often cannot even be expressed as a simple spectrum with two endpoints.
- Fred P. Brooks' Second System Effect
- Communication is a primary constraint
- Applies to computer systems and design teams
- Some of Fred P. Brooks' techniques for design teams apply to computer systems
- Offloading concerns allows more efficient concentration of effort
- Localization of processing/minimizing more expensive communication
- Disruption of processing can be more expensive than just the time to handle the disruption
- Complexity is expensive - budget accordingly
Debatable
- Anything that can be done with cacheable memory should also work with uncacheable memory.
It should be possible to disable caches, and for programs to keep working.
- Glew
- This facilitates debugging: if you have a complicated problem, one of the first things you can try is to turn off caching. If the problem goes away, it does NOT prove that it is a problem with caching - it could also be a timing problem fixed by the usually much slower uncached behavior. But if the problem still persists, it highly indicates that the problem is NOT with the cache protocol.
- Unfortunately, many "advanced" mechanisms, such as LL/SC, AMD ASF, and TM (Transactional Memory), only work with cacheable memory, at least
- In my opinion, that is a reason to look askance on these mechanisms, or at least to figure out ways of making these things work with uncacheable.
See also
Big Historical Mistakes in Computer Architecture Bad, Good, and Middling Ideas in Computer Architecture